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1 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. 64mx32 flash multi-chip package 3.0v page mode flash memory single power supply operation ? 3 volt read, erase, and program operations i/o control ? all input levels (address, control, and dq input levels) and outputs are determined by voltage on v io input. v io range is 1.65 to v cc secured silicon sector region ? 128-word/256-byte sector for permanent, secure identi? cation through an 8-word/16-byte random electronic serial number, accessible through a command sequence ? may be programmed and locked at the factory or by the customer flexible sector architecture ? five hundred twelve 64 kword (128 kbyte) sectors ? two hundred ? fty-six 64 kword (128 kbyte) sectors ? one hundred twenty-eight 64 kword (128 kbyte) sectors compatibility with jedec standard ? provides software compatibility for single-power supply ? ash, and superior inadvertent write protection 100,000 erase cycles per sector typical 20-year data retention typical performance characteristics high performance ? 100, 120 ns ? 8-word/16-byte page read buffer ? 25 ns page read times ? 16-word/32-byte write buffer reduces overall programming time for multiple-word updates package option ? 107 bga, 14mm x 17mm ? 1.0mm pitch software features ? program suspend and resume: read other sectors before programming operation is completed ? erase suspend and resume: read/program other sectors before an erase operation is completed ? data# polling and toggle bits provide status ? unlock bypass program command reduces overall multiple-word programming time ? cfi (common flash interface) compliant: allows host system to identify and accommodate multiple ? ash devices hardware features ? advanced sector protection ? wp#/acc input accelerates programming time (when high voltage is applied) for greater throughput during system production. protects ? rst or last sector regardless of sector protection settings ? hardware reset input (reset#) resets device ? ready/busy# output (ry/by#) detects program or erase cycle completion * this product is under development, is not quali? ed or characterized and is subject to change or cancellation without notice. features
2 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. general description the w764mb2v-xsbx device is a 3.0v single power flash memory. the device utilizes four organized as 33,554,432 words or 67, 108,864 bytes. the device has 64 -bit wide data bus that can also function as an 32-bit wide data bus by using the byte# input. the device can be programmed either in the host system or in standard eprom programmers. each device requires a single 3.0 volt power supply for both read and write functions. in addition to a v cc input, an high-voltage accelerated program (wp / acc) input provides shorter programming times through increased current. this feature is intended to facilitate factory throughput during system production, but may also be used in the ? eld if desired. the devices are entirely command set compatible with the jedec single power-supply flash standard. commands are written to the device using standard microprocessor write timing. write cycles also internally latch addresses and data needed for the programming and erase operations. the sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. the device is fully erased when shipped from the factory. device programming and erasure are initiated through command sequences. once a program or erase operation has begun, the host system need only poll the dq7 (data# polling) or dq6 (toggle) status bits or monitor the ready / busy# (ry / by#) output to determine whether the operation is complete. to facilitate programming, an unlock bypass mode reduces command sequence over head by requiring only two write cycles to program data instead of four. the i/o (v io ) control allows the host system to set the voltage levels that the device generates and tolerates on all input levels (address, chip control, and dq input levels) to the same voltage level that is asserted on the v io pin. this allows the device to operate in a 1.8 v or 3 v system environment as required. hardware data protection measures include a low v cc detector that automatically inhibits write operations during power transitions. persistent sector protection provides in-system, comand-enabled protection of any combination of sectors using a single power supply at v cc . password sector protection prevents unauthorized write and erase operations in any combination of sectors through a user- de? ned 64-bit password. the erase suspend / erase resume feature allows the host system to pause and erase operation in a given sector to read or program any other sector and then complete the erase operation. the program suspend / program resume feature enables the host system to pause the program operation in a given sector to read any other sector and then complete the program operation. the hardware reset# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. the reset# pin may be tied to the system reset circuitry. a system reset would thus also reset the device, enabling the host system to read boot-up ? rmware from the flash memory device. the device reduces power consumption in the standby mode when it detects speci? c voltage levels on cs# and reset#, or when addresses have been stable for a speci? ed period of time. the secured silicon sector provides a 128-work/256-byte area for code or data that can be permanently protected. once this sector is protected, no further changes within the sector can occur. the write protect (wp# / acc) feature protects the ? rst or last sector by asserting a logic low on the wp# pin.
3 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. we0# we1# cs1# cs0# ry/by# reset# oe# a-1,a 0-24 wp#/acc dq 8-15 dq 16-23 dq 24-31 dq 0-7 64m x 8 64m x 8 64m x 8 64m x 8 vcc vi0 dq12 dq13 dq14 dq15 dq0 dq1 dq18 dq19 vio gnd dq24 dq8 gnd a0 a3 vcc gnd dq10 dq25 dq9 gnd a1 a4 a6 ry/by# vio dq27 dq11 dq26 gnd oe# a5 a7 dq29 dq28 dnu gnd a2 vio vcc reset# wp/acc# a14 dq30 dq31 vio gnd cs0# we1# a15 gnd vio vcc gnd vio gnd a22 a23 a17 a18 a8 vio gnd vcc gnd vio vcc gnd vio gnd vio dq17 dq16 vio gnd cs1# we0# a19 dq2 dq3 dnu gnd a20 a21 a-1 dq4 dq20 dq21 gnd a10 a9 a16 dq5 dq6 dq23 gnd a12 a11 a24 vcc dq22 dq7 gnd a13 vcc a b c d e f g h j k l m 123456789 block diagram pin description dq 0-63 data inputs/outputs a 0-24, a-1* address inputs we# 0-1 write enables cs# 0-1 chip selects oe# output enable reset# hardware reset wp#/acc hardware write protection/acceleration ry/by# ready/busy output v cc power supply v io i/o power supply gnd ground dnu do not use * a-1 is the least signi? cant address. fig 1: pin configuration (top view)
4 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. absolute maximum ratings parameter unit operating temperature -55 to +125 c supply voltage range (v cc ) -0.5 to +4.0 v signal voltage range -0.5 to vcc +0.5 v storage temperature range -55 to +125 c endurance (write/erase cycles) 1,000,000 min. cycles notes: 1. minimum dc voltage on input or input or i/os is -0.5v. during voltage transitions, inputs or i/os may overshoot v ss to -2.0v for periods of up to 20ns. maximum dc voltage on input or i/os us vcc + 0.5v. during voltage transitions, input or i/o pins may overshoot to v cc + 2.0v for periods up to 20ns 2. minimum dc input voltage on pins a9, oe#, and acc is 0.5v. during voltage transitions, a9, oe#, and acc may overshoot v ss to -2.0v for periods of up to 20ns. maximum dc input voltage on pin a9, oe#, and acc is +12.5v which may overshoot to +14.0v for periods up to 20ns 3. no more than one output may be shorted to ground at a time. duration of the short circuit should not be greater than one second. 4. stresses above those listed under absolute maxium ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of the data sheet is not implied. exposure of the device to absolute maxium rating conditons for extended peroids may affect device reliability recommended operating conditions parameter symbol min max unit supply voltage v cc 3.0 3.6 v operating temp. (mil.) t a -55 +125 c operating temp. (ind.) t a -40 +85 c capacitance t a = +25c, f = 1.0mhz parameter symbol max unit we1-4# capacitance c we tbd pf cs1-4# capacitance c cs tbd pf data i/o capacitance c i/o tbd pf address input capacitance c ad tbd pf reset# capacitance c rs tbd pf ry/by# capacitance c rb tbd pf oe# capacitance c oe tbd pf this parameter is guaranteed by design but not tested. data retention parameter test conditions min unit pattern data retention time 150c 10 years 125c 20 years
5 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. dc characteristics C cmos compatible v cc = 3.3v 0.3v, -55c t a +125c parameter symbol conditions min typ max unit input load current (1) i li v in = v ss to v cc , #v cc = v cc(max) wp/acc: 2.0 a others: 1.0 a9 input load current i lit v cc = to v cc(max) ; a9 = 12.5v 35 a output leakage current i lo v out = v ss to v cc , # v cc = v cc(max) 1.0 a v cc active current for read (1) i cc1 ce# = v il #, oe# = v ih , v cc = v cc(max) ; # f = 1 mhz, byte mode 24 80 ma ce# = v il #, oe# = v ih , v cc = v cc(max) ; # f = 5mhz, word mode 120 200 ma v cc intra-page read current (1) i cc2 ce# = v il #, oe# = v ih , v cc = v cc(max) ; f = 10mhz 110ma v cc active erase/program current (2,3) i cc3 ce# = v il #, oe# = v ih , v cc = v cc(max) 200 320 ma v cc standby current i cc4 v cc = v cc(max); v io = v cc ; oe# = v ih ; # v il = v ss + 0.3v/-0.1v; # ce#, reset# = v ss 0.3v 420a v cc reset current i cc5 v cc = v cc(max); v io = v ss + 0.3v/- 0.1v; reset# = v ss 0.3v 420a automatic sleep mode (4) i cc6 v cc = v cc(max); v io = v cc ; v ih = v cc 0.3v; #v il = v ss + 0.3v/- 0.1v; wp#/a cc = v ih 420a a cc accelerated program current i acc ce# = v il , oe# = v ih , v cc = v cc(max) , #wp#/a cc = v ih wp#/a cc pin 40 80 ma v cc pin 200 320 input low voltage (5) v il -0.1 0.3 x v io v input high voltage (5) v ih 0.7 x v io v io + 0.3 v voltage for acc erase/program acceleration v hh v cc = 2.7 - 3.6v 11.5 12.5 v voltage for autoselect and temporary sector unprotect v id v cc = 2.7 - 3.6v 11.5 12.5 v output low voltage (5) v ol i ol = -100 a 0.15 x v io v output high voltage (5) v oh i oh = -100 a 0.85 x v io v low v cc lock-out voltage v lko 2.3 2.5 v notes: 1. the i cc current is typically less than 2 ma/mhz, with oe# at v ih 2. i cc active while embedded erase or embedded program or write buffer programming is in progress. 3. not 100% tested. 4. automatic sleep mode enables the lower power mode when addresses remain stable for t acc + 30ns. 5. v io = 1.65-1.95v or 2.7-3.6v. 6. v cc = 3 v and v io = 3v or 1.8v. when v io is at 1.8v, i/o pins cannot operate at 3v.
6 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. ac characteristics C write/erase/program operations C we# controlled v cc = 3.3v 0.3v, -55c t a +125c parameter symbol -100 -120 unit min max min max write cycle time (3) t avav t wc 100 120 ns chip select setup time (3) t elwl t cs 00ns write enable pulse width t wlwh t wp 35 50 ns address setup time t avwl t as 00ns data setup time t dvwh t ds 45 50 ns data hold time t whdx t dh 00ns address hold time t wlax t ah 45 50 ns write enable pulse width high (3) t whwl t wph 30 30 ns duration of byte programming operation (1) t whwh1 500 500 s sector erase (2) t whwh2 3.5 5 sec read recovery time before write (3) t ghwl 00ns vcc setup time t vcs 50 50 s address setup time to oe# low during toggle bit polling t aso 15 15 ns write recovery time from ry/by# (3) t rb 00ns program/erase valid to ry/by# t busy 90 90 ns notes: 1. typical value for t whwh 1 is 60 s. 2. typical value for t whwh 2 is 0.5 sec. 3. guaranteed by design, but not tested. ac characteristics C read-only operations v cc = 3.3v 0.3v, -55c t a +125c parameter symbol -100 -120 unit min max min max read cycle time (1) t avav t rc 100 120 ns address access time t avqv t acc 100 120 ns chip select access time t elqv t ce 100 120 ns page access time t pacc 25 30 ns output enable to output valid t glqv t oe 25 35 ns chip select high to output high z t ehqz t df 20 20 ns output enable high to output high z t ghqz t df 20 20 ns output hold from addresses, cs# or oe# change, whichever occurs ? rst t axqx t oh 00ns output enable hold time (1) read t oeh 0 0 ns toggle and data# polling 10 10 ns 1. guaranteed by design, not tested.
7 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 2: ac waveforms for read operations addresses cs# oe# we# outputs high z addresses stable t oe t rc output valid t ce t acc t oh high z t df reset# ry/by# ov t oeh figure 3: page read timing amax - a2 ce# oe# a 2 - a -1 data bus same page aa ab ac ad qa qb qc qd t acc t pac c t pac c t pac c
8 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. ac characteristics C hardware reset (reset#) parameter symbol unit min max reset# pin low (during embedded algorithms) to read mode (1) t ready 20 s reset# pin low (not during embedded algorithms) to read mode (1) t ready 500 ns reset# pulse width t rp 500 ns reset# high time before read (1) t rh 50 ns reset# low to standby mode (1) t rpd 20 s ry/by# recovery time t rb 0ns note: 1. not tested. ry/by# cs#, oe# reset# t rp t ready t rh t ready t rp t rh t rb ry/by# cs#, oe# reset# figure 4: reset timings not during embedded algorithms figure 5: reset timings during embedded algorithms
9 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 6: program operations addresses cs# oe# we# data ry/by# v cc 555h pa pa t wc t ah t whwh1 pd status d out a0h t busy pa t as t ch t wp t cs t wph t ds t dh t vcs t rb notes: 1. pa is the address of the memory location to be programmed. 2. pd is the data to be programmed at byte address. 3. d out is the output of the data written to the device. 4. figure indicates last two bus cycles of four bus cycle sequence.
10 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 7: accelerated program timing diagram figure 8: chip/sector erase operation timings v hh t vhh t vhh v il or v ih wp#/a cc v il or v ih t dh 2aah sa va t wc t ah t whwh2 30h in progress complete 55h t busy va t as t ch t wp t cs t wph t ds t vcs t rb 10 for chip erase 555h for chip erase addresses cs# oe# we# data ry/by# v cc notes: 1. sa = sector address (for sector erase), va = valid address for reading status data
11 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 9: data polling timings (during embedded algorithms) addresses va va va t rc cs# complement complement true dq 0 -dq 6 t ce t ch t oe oe# we# t oeh t df t oh valid data high z ry/by# t busy dq 7 t acc status data status data true valid data high z note: va = valid address. illustration shows ? rst status cycle after command sequence, last status read cycle, and array data read c ycle.
12 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 10: toggle bit timings (during embedded algorithms) figure 11: dq2 vs. dq6 ry/by# dq 6 /dq 2 oe# cs# addresses we# t as t aht t aht t aso t ceph t oeh t oeph t dh valid data valid status valid data t oe (first read) (second read) (stops toggling) valid status valid status note: va = valid address, not required for dq 6 . illustration shows ? rst two status cycle after command sequence, last status read cycle, and array data read cycle. we# dq 6 dq 2 enter embedded erasing erase suspend enter erase suspend program erase resume erase erase suspend read erase suspend program erase suspend read erase erase complete note: dq 2 toggles only when read at an address within an erase-suspended sector. the system may use oe# or cs# to toggle dq 2 and dq 6 .
13 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. ac characteristics C alternate cs# controlled erase and program operations parameter description speed options unit jedec std 100 120 t avav t wc write cycle time (1) min 100 120 ns t avwl t as address setup time min 0 0 ns t elax t ah address hold time min 45 50 ns t dveh t ds data setup time min 45 50 ns t ehdx t dh data hold time min 0 0 ns t ghel t ghel read recovery time before write (oe# high to we# low) min 0 0 ns t wlel t ws we# setup time min 0 0 ns t ehwh t wh we# hold time min 0 0 ns t eleh t cp cs# pulse width min 35 35 ns t ehel t cph cs# pulse width high min 30 30 ns t whwh1 t whwh1 programming operation typ 60 6 s t whwh1 t whwh1 accelerated programming operation typ 54 54 s t whwh2 t whwh2 sector erase operation typ 0.5 05 sec note: 1. not tested.
14 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. figure 12: alternate cs# controlled write (erase/program) operation timings addresses 555 for program 2aa for erase pa t wc we# oe# cs# data t as t ah t cph t ws dq 7 # reset# t dh t ds pd for program 30 for sector erase 10 for chip erase pa for program sa for sector erase 555 for chip erase data# polling t wh t ghel t whwh1 or 2 t busy t hr a0 for program 55 for erase ry/by# t cp d out notes: 1. figure indicates last two bus cycles of a program or erase operation. 2. pa = program address, sa = sector address, pd = program data. 3. dq7 is the complement of the data written to the device. d out is the data written to the device.
15 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. package: 107 pbga (plastic ball grid array) 987654321 a b c d e f g h j k l m 17.10 (0.673) max 11.00 (0.433) nom 1.00 (0 .039) nom 1.00 (0.039)nom 8.00 (0.315) nom 14.10 (0.555) max 0.50 (0.020) nom 2.32 (0.091) max 107 x 0.60 (0.024)nom bottom view all linear dimensions are in millimeters and parenthetically in inches ordering information w 7 64m32 v xxx sb x white eletronic designs corp. flash: organization, 64m x 32: 3.3v power supply: access time (ns): 100 = 100ns 120 = 120ns es = non-quali? ed product 1 package type: sb = 107 pbga, 14mm x 17mm devise grade: m = military -55c to +125c i = industrial -40c to +85c c = commercial 0c to +70c blank = no temperature range speci? ed for non-quali? ed product note 1: w764m32v-essb is only available product until completion of quali? cation.
16 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs w764m32v-xsbx march 2006 rev. 2 advanced* white electronic designs corp. reserves the right to change products or speci? cations without notice. document title 64mx32 flash 3.3v revision history rev # history release date status rev 0 initial release november 2005 advanced rev 1 changes (all pages) 1.1 add ac + dc characteristics and timing diagrams 1.2 update package dimensions 1.3 add preliminary pinout february 2006 advanced rev 2 changes (pg. 1, 3, 16) 2.1 correct typographical error in pinout on page 3, ball 'b4' is dq9 march 2006 advanced

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